Defense Notices


All students and faculty are welcome to attend the final defense of EECS graduate students completing their M.S. or Ph.D. degrees. Defense notices for M.S./Ph.D. presentations for this year and several previous years are listed below in reverse chronological order.

Students who are nearing the completion of their M.S./Ph.D. research should schedule their final defenses through the EECS graduate office at least THREE WEEKS PRIOR to their presentation date so that there is time to complete the degree requirements check, and post the presentation announcement online.

Upcoming Defense Notices

Luke Staudacher

Enabling Versal-Based Signal Processing Through a Development Framework and User Guide

When & Where:


Nichols Hall, Room 246 (Executive Conference Room)

Committee Members:

Jonathan Owen, Chair
Shannon Blunt
Carl Leuschen
Erik Perrins

Abstract

AMD’s latest generation of adaptive system-on-chip (SoC) devices, the Versal product family, offers enhanced processing capabilities that are attractive to researchers and system designers. However, these capabilities introduce a significant knowledge barrier, limiting the practical benefits of Versal devices compared to more mature platforms from AMD, Intel, and other industry vendors. This project addresses this challenge through two primary deliverables: a software framework and a comprehensive user manual targeting Versal development. The software framework, named RSL Versal Core, provides a framework for users unfamiliar with Versal devices by selectively abstracting away more complex design components. Using a small set of commands, users can synthesize a programmable logic (PL) design, compile a Linux operating system for the onboard Arm processor with PL communication support, and program supported development boards. Following initial setup, the framework also supports extended software and firmware development for specific project needs. The accompanying user manual documents both RSL Versal Core and broader Versal development concepts. It guides users through reproducing and customizing the framework outputs manually and introduces key architectural and design principles useful for effective Versal-based system development. Together, these deliverables enable new developers to rapidly gain proficiency with Versal platforms and enable implementation of digital signal processing (DSP) concepts.


William Powers

Implementation and Analysis of Robust System-Informed Waveform Design

When & Where:


Nichols Hall, Room 246 (Executive Conference Room)

Committee Members:

Jonathan Owen, Chair
Shannon Blunt
Carl Leuschen


Abstract

Due to rapid advances in high-speed analog-to-digital conversion and software-defined architectures, modern radar systems increasingly shift signal generation and conditioning into the digital domain. These architectures enable high-fidelity signal capture and provide substantial flexibility in waveform synthesis and signal processing that was previously impractical in analog implementations. Despite these advances, however, achievable radar performance remains fundamentally constrained by the physical transmit hardware through which the signal is ultimately realized. Nonlinear amplification, finite bandwidth, and memory effects introduce distortion that creates a significant gap between idealized waveform design and the waveform that is physically radiated.

To address this limitation, this work proposes a system-aware radar waveform design framework that couples data-driven system identification with deterministic optimization to generate waveforms tailored to the underlying transmit hardware. A complex baseband memory polynomial model is developed to characterize nonlinear transmit-chain behavior using loopback measurements, where $\ell_1$-regularized LASSO estimation is employed to improve robustness against ill-conditioning and feature redundancy. Under this architecture, a generalized integrated sidelobe level (GISL) objective is reformulated using logarithmic scalarization to produce a numerically stable and Pareto-tunable optimization criterion capable of balancing output energy and sidelobe suppression. Additionally, efficient vectorized gradient expressions are derived using Wirtinger calculus and implemented using gradient-based descent and the limited-memory BFGS algorithm for practical high-dimensional waveform synthesis.

To validate the framework, a comprehensive hardware-in-the-loop testbench was developed supporting direct model identification and experimental evaluation of optimized waveform performance. Simulation and experimental results demonstrate that continuous-phase FM waveforms exhibit strong inherent robustness to nonlinear distortion, while phase-coded waveforms with large instantaneous phase discontinuities show significantly greater sensitivity to transmit-chain impairments. Across both waveform classes, the proposed framework achieves substantial improvements in output power efficiency and pulse compression performance relative to system-agnostic waveform design. These results demonstrate that transmitter constraints must be treated as fundamental design variables rather than secondary effects and establish system-aware optimization as a practical framework for next-generation radar waveform synthesis.


Cody Gish

Real-time GPU Based Arbitrary Waveform Generation Utilizing a Software-Defined Radar Platform

When & Where:


Nichols Hall, Room 246 (Executive Conference Room)

Committee Members:

Jonathan Owen, Chair
Shannon Blunt
Patrick McCormick


Abstract

Due to the ever-growing demand for access to the finite resources of the electromagnetic spectrum, significant effort has been directed toward improving spectrum utilization. This has become a particular challenge in radar transmission design, where waveform diversity techniques have emerged as a promising solution despite the accompanying implementation complexity. Diverse signals are inherently non-repeating and pose unique challenges in comparison to traditional radar waveforms. Software defined radios (SDRs) allow for traditional RF components and signal processing to be implemented and controlled in software rather than hardware, providing a platform for testing experimental radar algorithms. This thesis presents a real-time parallel implementation of five previously developed distinct waveform-diverse radar signals for use in a coherent SDR system. The implemented waveforms include stochastic waveform generation (StoWGe), multi-user radar communication (MURC), phase-attached radar communication (PARC), pseudo-random optimized frequency modulation (PRO-FM), and waveform recycling. To enable real-time generation at maximum SDR data rates, these waveforms are implemented using digital synthesis techniques via GPU parallel processing. This approach alleviates CPU resource limitations by offloading computationally intensive waveform generation tasks to the GPU, enabling continuous high-throughput operation. A custom asynchronous transmit and receive architecture is developed to integrate these GPU-accelerated waveforms with UHD-based SDR hardware. The system leverages a multithreaded framework approach that can sustain coherent and synchronized radar operation. To validate the system, a series of loopback testing across all waveforms and a variety of parameters is completed to confirm the execution of the generate-transmit-receive chain.


Past Defense Notices

Dates

Mahmudul Hasan

Trust Assurance of Commercial Off-The-Shelf (COTS) Hardware Through Verification and Runtime Resilience

When & Where:


Eaton Hall, Room 2001B

Committee Members:

Tamzidul Hoque, Chair
Esam El-Araby
Prasad Kulkarni
Hongyang Sun
Huijeong Kim

Abstract

The adoption of Commercial off-the-shelf (COTS) components has become a dominant paradigm in modern system design due to their reduced development cost, faster time-to-market, and widespread availability. However, the reliance on globally distributed and untrusted supply chains introduces significant security risks, particularly the possibility of malicious hardware modifications such as Trojans, embedded during design or fabrication. In such settings, traditional methods that depend on golden models, full design visibility, or trusted fabrication are no longer sufficient, creating the need for new security assurance approaches under a zero-trust model. This proposed research addresses security challenges in COTS microprocessors through two complementary solutions: runtime resilience and pre-deployment trust verification. First, a multi-variant-execution-based framework is developed that leverages functionally equivalent program variants to induce diverse microarchitectural execution patterns. By comparing intermediate outputs across variants, the framework enables runtime detection and tolerance of Trojan induced payload effects without requiring hardware redundancy or architectural modifications. To enhance the effectiveness of variant generation, a reinforcement learning assisted framework is introduced, in which the reward function is defined by security objectives rather than traditional performance optimization, enabling the generation of variants that are more robust against repeated Trojan activation. Second, to enable black-box trust verification prior to deployment, this work presents a framework that can efficiently test the presence of hardware Trojans by identifying microarchitectural rare events and transferring activation knowledge from existing processor designs to trigger highly susceptible internal nodes. By leveraging ISA-level knowledge, open-source RTL references, and LLM-guided test generation, the framework achieves high trigger coverage without requiring access to proprietary designs or golden references. Building on these two scenarios, a future research direction is outlined for evolving trust in COTS hardware through continuous runtime observation, where multi-variant execution is extended with lightweight monitoring mechanisms that capture key microarchitectural events and execution traces. These observations are accumulated as hardware trust counters, enabling the system to progressively establish confidence in the underlying hardware by verifying consistent behavior across diverse execution patterns over time. Together, these directions establish a foundation for analyzing and mitigating security risks across zero-trust COTS supply chains.


Moh Absar Rahman

Permissions vs Promises: Assessing Over-privileged Android Apps via Local LLM-based Description Validation

When & Where:


Eaton Hall, Room 2001B

Committee Members:

Drew Davidson, Chair
Sankha Guria
David Johnson


Abstract

Android is the most widely adopted mobile operating system, supporting billions of devices and driven by a robust app ecosystem.  Its permission-based security model aims to enforce the Principle of Least Privilege (PoLP), restricting apps to only the permissions it needs.  However, many apps still request excessive permissions, increasing the risk of data leakage and malicious exploitation. Previous research on overprivileged permission has become ineffective due to outdated methods and increasing technical complexity.  The introduction of runtime permissions and scoped storage has made some of the traditional analysis techniques obsolete.  Additionally, developers often are not transparent in explaining the usage of app permissions on the Play Store, misleading users unknowingly and unwillingly granting unnecessary permissions. This combination of overprivilege and poor transparency poses significant security threats to Android users.  Recently, the rise of local large language models (LLMs) has shown promise in various security fields. The main focus of this study is to analyze whether an app is overpriviledged based on app description provided on the Play Store using Local LLM. Finally, we conduct a manual evaluation to validate the LLM’s findings, comparing its results against human-verified response.


Mohsen Nayebi Kerdabadi

Representation Augmentation for Electronic Health Records via Knowledge Graphs, Large Language Models, and Contrastive Learning

When & Where:


Learned Hall, Room 3150

Committee Members:

Zijun Yao, Chair
Sumaiya Shomaji
Hongyang Sun
Dongjie Wang
Shawn Keshmiri

Abstract

Electronic Health Records (EHRs) provide rich longitudinal patient information, but their high dimensionality, sparsity, heterogeneity, and temporal complexity make robust representation learning difficult. This dissertation studies how to improve patient and medical concept representation learning in EHRs and consequently enhance healthcare predictive tasks by integrating domain knowledge, knowledge graphs, large language models (LLMs), and contrastive learning. First, it introduces an ontology-aware temporal contrastive framework for survival analysis that learns discriminative patient representations from censored and observed trajectories by modeling temporal distinctiveness in longitudinal EHR data. Second, it proposes a multi-ontology representation learning framework that jointly propagates knowledge within and across diagnosis, medication, and procedure ontologies, enabling richer medical concept embeddings, especially under limited data and for rare conditions. Third, it develops an LLM-enriched, text-attributed medical knowledge graph framework that combines EHR-derived statistical evidence with type-constrained LLM reasoning to infer semantic relations, generate contextual node and edge descriptions, and co-learn concept embeddings through joint language-model and graph-neural-network training. Together, these studies advance a unified view of EHR representation learning in which structured medical knowledge, textual semantics, and temporal patient trajectories are jointly leveraged to build more accurate, interpretable, and robust healthcare prediction models.


Brinley Hull

Mist – An Interactive Virtual Pet for Autism Spectrum Disorder Stress Onset Detection & Mitigation

When & Where:


Nichols Hall, Room 317 (Moore Conference Room)

Committee Members:

Arvin Agah, Chair
Perry Alexander
David Johnson
Sumaiya Shomaji

Abstract

Individuals with Autism Spectrum Disorder (ASD) frequently experience elevated stress and are at higher risk for mood disorders such as anxiety and depression. Sensory over-responsivity, social challenges, and difficulties with emotional recognition and regulation contribute to such heightened stress. This study presents a proof-of-concept system that detects and mitigates stress through interactions with a virtual pet. Designed for young adults with high-functioning autism, and potentially useful for people beyond that group, the system monitors simulated heart rate, skin resistance, body temperature, and environmental sound and light levels. Upon detection of stress or potential triggers, the system alerts the user and offers stress-reduction activities via a virtual pet, including guided deep-breathing exercises and interactive engagement with the virtual companion. Through combining real-time stress detection with interactive interventions on a single platform, the system aims to help autistic individuals recognize and manage stress more effectively.


Harun Khan

Identifying Weight Surgery Attacks in Siamese Networks

When & Where:


Nichols Hall, Room 246 (Executive Conference Room)

Committee Members:

Prasad Kulkarni, Chair
Alex Bardas
Bo Luo


Abstract

Facial recognition systems increasingly rely on machine learning services, yet they remain vulnerable to cyber-attacks. While traditional adversarial attacks target input data, an underexplored threat comes from weight manipulation attacks, which directly modify model parameters and can compromise deployed systems in cyber-physical settings. This paper investigates defenses against Weight Surgery, a weight manipulation attack that modifies the final linear layer of neural networks to merge or shatter classes without requiring access to training data. We propose a computationally lightweight defense capable of detecting sample pairs affected by Weight Surgery at low false-positive rates. The defense is designed to operate in realistic deployment scenarios, selecting its sensitivity parameter 𝛾 using only benign samples to meet a target false-positive rate. Evaluation on 1000 independently attacked models demonstrates that our method achieves over 95% recall at a target false-positive rate of 0.001. Performance remains strong even under stricter conditions: at FPR = 0.0001, recall is 92.5%, and at 𝛾=0.98, FPR drops to 0.00001 while maintaining 88.9% recall. These results highlight the robustness and practicality of the defense, offering an effective safeguard for neural networks against model-targeted attacks.


Tanvir Hossain

Security Solutions for Zero-Trust Microelectronics Supply Chains

When & Where:


Nichols Hall, Room 246 (Executive Conference Room)

Committee Members:

Tamzidul Hoque, Chair
Drew Davidson
Prasad Kulkarni
Heechul Yun
Huijeong Kim

Abstract

Microelectronics supply chains increasingly rely on globally distributed design, fabrication, integration, and deployment processes, making traditional assumptions of trusted hardware inadequate. Security in this setting can be understood through a zero-trust microelectronics supply-chain model, in which neither manufacturing partners nor procured hardware platforms are assumed trustworthy by default. Two complementary threat scenarios are considered in the proposed research. In the first scenario, custom Integrated Circuits (ICs) fabricated through potentially untrusted foundries are examined, where design-for-security protections intended to prevent piracy, overproduction, and intellectual-property theft can themselves become vulnerable to attacks. In this scenario, hardware Trojan-assisted meta-attacks are used to show that such protections can be systematically identified and subverted by fabrication-stage adversaries. In the second scenario, commercial off-the-shelf ICs are considered from the perspective of end users and procurers, where internal design visibility is unavailable and hardware trustworthiness cannot be directly verified. For this setting, runtime-oriented protection mechanisms are developed to safeguard sensitive computation against malicious hardware behavior and side-channel leakage. Building on these two scenarios, a future research direction is outlined for side-channel-driven vulnerability discovery in off-the-shelf devices, motivated by the need to evaluate and test such platforms prior to deployment when no design information is available. The proposed direction explores gray-box security evaluation using power and electromagnetic side-channel analysis to identify anomalous behaviors and potential vulnerabilities in opaque hardware platforms. Together, these directions establish a foundation for analyzing and mitigating security risks across zero-trust microelectronics supply chains.


Krishna Chaitanya Reddy Chitta

A Dynamic Resource Management Framework and Reconfiguration Strategies for Cloud-native Bulk Synchronous Parallel Applications

When & Where:


Eaton Hall, Room 2001B

Committee Members:

Hongyang Sun, Chair
David Johnson
Sumaiya Shomaji


Abstract

Many High Performance Computing (HPC) applications following the Bulk Synchronous Parallel

(BSP) model are increasingly deployed in cloud-native, multi-tenant container environments such

as Kubernetes. Unlike dedicated HPC clusters, these shared platforms introduce resource virtualization

and variability, making BSP applications more susceptible to performance fluctuations.

Workload imbalance across supersteps can trigger the straggler effect, where faster tasks wait

at synchronization barriers for slower ones, increasing overall execution time. Existing BSP resource

management approaches typically assume static workloads and reuse a single configuration

throughout execution. However, real-world workloads vary due to dynamic data and system conditions,

making static configurations suboptimal. This limitation underscores the need for adaptive

resource management strategies that respond to workload changes while considering reconfiguration

costs.

 

To address these limitations, we evaluate a dynamic, data-driven resource management framework

tailored for cloud-native BSP applications. This approach integrates workload profiling,

time-series forecasting, and predictive performance modeling to estimate task execution behavior

under varying workload and resource conditions. The framework explicitly models the trade-off

between performance gains achieved through reconfiguration and the associated checkpointing

and migration costs incurred during container reallocation. Multiple reconfiguration strategies

are evaluated, spanning simple window-based heuristics, dynamic programming methods, and

reinforcement learning approaches. Through extensive experimental evaluation, this framework

demonstrates up to 24.5% improvement in total execution time compared to a baseline static configuration.

Furthermore, we systematically analyze the performance of each strategy under varying

workload characteristics, simulation lengths, and checkpoint penalties, and provide guidance on

selecting the most appropriate strategy for a given workload environment.


Smriti Pranjal

NoBIAS: Non-coding RNA Base Interaction Annotation using Visual Snapshot

When & Where:


Slawson Hall, Room 198

Committee Members:

Cuncong Zhong, Chair
Sumaiya Shomaji
Hongyang Sun
Zijun Yao
Xiaoqing Wu

Abstract

Non-coding RNAs fold into complex 3D structures that govern their biological functions, with RNA structural motifs (RSMs) serving as conserved building blocks of this architecture.
These motifs are defined by characteristic base-interaction patterns, making accurate identification and classification of RNA interactions essential for understanding RNA structure and function.

Despite their biological importance, accurately identifying and classifying these interactions remains challenging because the available data are highly variable in quality and scarce in quantity. This compromises annotation reliability, hinders the construction of trustworthy ground truth for systematic assessment, and restricts the supply of reliable training examples needed for supervised learning.

To address this, we introduce NoBIAS, the first resolution-aware, integrated machine learning-based suite for annotating base interactions from 3D RNA structures, inspired by human pattern recognition, augmented with structure prediction for data enrichment, and evaluated on a carefully curated, stratified benchmark.

NoBIAS is a hierarchical framework for RNA base-interaction annotation that integrates interaction-specific inductive biases with multimodal representation learning. By combining a convolution-augmented, rule-guided module for stacking interactions with complementary graph and image encoders for pairing interactions, NoBIAS captures both structural priors and local visual cues of RNA base doublets. A performance-calibrated logit fusion scheme then adaptively integrates modality-specific predictions based on local-structural resolution, enabling robust inference across heterogeneous 3D RNA structures.

Evaluation across multiple benchmark tiers: spanning consensus, homolog-supported, and manually verified cases, shows that NoBIAS consistently outperforms existing methods under increasingly challenging conditions. Together, the NoBIAS design and its evaluation framework provide a systematic foundation for robust RNA base-interaction annotation, enabling more reliable analysis of RNA structure under realistic uncertainty.


Md Mashfiq Rizvee

Hierarchical Probabilistic Architectures for Scalable Biometric and Electronic Authentication in Secure Surveillance Ecosystems

When & Where:


Eaton Hall, Room 2001B

Committee Members:

Sumaiya Shomaji, Chair
Tamzidul Hoque
David Johnson
Hongyang Sun
Alexandra Kondyli

Abstract

Secure and scalable authentication has become a primary requirement in modern digital ecosystems, where both human biometrics and electronic identities must be verified under noise, large population growth and resource constraints. Existing approaches often struggle to simultaneously provide storage efficiency, dynamic updates and strong authentication reliability. The proposed work advances a unified probabilistic framework based on Hierarchical Bloom Filter (HBF) architectures to address these limitations across biometric and hardware domains. The first contribution establishes the Dynamic Hierarchical Bloom Filter (DHBF) as a noise-tolerant and dynamically updatable authentication structure for large-scale biometrics. Unlike static Bloom-based systems that require reconstruction upon updates, DHBF supports enrollment, querying, insertion and deletion without structural rebuild. Experimental evaluation on 30,000 facial biometric templates demonstrates 100% enrollment and query accuracy, including robust acceptance of noisy biometric inputs while maintaining correct rejection of non-enrolled identities. These results validate that hierarchical probabilistic encoding can preserve both scalability and authentication reliability in practical deployments. Building on this foundation, Bio-BloomChain integrates DHBF into a blockchain-based smart contract framework to provide tamper-evident, privacy-preserving biometric lifecycle management. The system stores only hashed and non-invertible commitments on-chain while maintaining probabilistic verification logic within the contract layer. Large-scale evaluation again reports 100% enrollment, insertion, query and deletion accuracy across 30,000 templates, therefore, solving the existing problem of blockchains being able to authenticate noisy data. Moreover, the deployment analysis shows that execution on Polygon zkEVM reduces operational costs by several orders of magnitude compared to Ethereum, therefore, bringing enrollment and deletion costs below $0.001 per operation which demonstrate the feasibility of scalable blockchain biometric authentication in practice. Finally, the hierarchical probabilistic paradigm is extended to electronic hardware authentication through the Persistent Hierarchical Bloom Filter (PHBF). Applied to electronic fingerprints derived from physical unclonable functions (PUFs), PHBF demonstrates robust authentication under environmental variations such as temperature-induced noise. Experimental results show zero-error operation at the selected decision threshold and substantial system-level improvements as well as over 10^5 faster query processing and significantly reduced storage requirements compared to large scale tracking.


Fatima Al-Shaikhli

Optical Measurements Leveraging Coherent Fiber Optics Transceivers

When & Where:


Nichols Hall, Room 246 (Executive Conference Room)

Committee Members:

Rongqing Hui, Chair
Shannon Blunt
Shima Fardad
Alessandro Salandrino
Judy Wu

Abstract

Recent advancements in optical technology are invaluable in a variety of fields, extending far beyond high-speed communications. These innovations enable optical sensing, which plays a critical role across diverse applications, from medical diagnostics to infrastructure monitoring and automotive systems. This research focuses on leveraging commercially available coherent optical transceivers to develop novel measurement techniques to extract detailed information about optical fiber characteristics, as well as target information. Through this approach, we aim to enable accurate and fast assessments of fiber performance and integrity, while exploring the potential for utilizing existing optical communication networks to enhance fiber characterization capabilities. This goal is investigated through three distinct projects: (1) fiber type characterization based on intensity-modulated electrostriction response, (2) coherent Light Detection and Ranging (LiDAR) system for target range and velocity detection through different waveform design, including experimental validation of frequency modulation continuous wave (FMCW) implementations and theoretical analysis of orthogonal frequency division multiplexing (OFDM) based approaches and (3) birefringence measurements using a coherent Polarization-sensitive Optical Frequency Domain Reflectometer (P-OFDR) system.

Electrostriction in an optical fiber is introduced by interaction between the forward propagated optical signal and the acoustic standing waves in the radial direction resonating between the center of the core and the cladding circumference of the fiber. The response of electrostriction is dependent on fiber parameters, especially the mode field radius. We demonstrated a novel technique of identifying fiber types through the measurement of intensity modulation induced electrostriction response. As the spectral envelope of electrostriction induced propagation loss is anti-symmetrical, the signal to noise ratio can be significantly increased by subtracting the measured spectrum from its complex conjugate. We show that if the field distribution of the fiber propagation mode is Gaussian, the envelope of the electrostriction-induced loss spectrum closely follows a Maxwellian distribution whose shape can be specified by a single parameter determined by the mode field radius.        

We also present a self-homodyne FMCW LiDAR system based on a coherent receiver. By using the same linearly chirped waveform for both the LiDAR signal and the local oscillator, the self-homodyne coherent receiver performs frequency de-chirping directly in the photodiodes, significantly simplifying signal processing. As a result, the required receiver bandwidth is much lower than the chirping bandwidth of the signal. Simultaneous multi-target of range and velocity detection is demonstrated experimentally. Furthermore, we explore the use of commercially available coherent transceivers for joint communication and sensing using OFDM waveforms.

In addition, we demonstrate a P-OFDR system utilizing a digital coherent optical transceiver to generate a linear frequency chirp via carrier-suppressed single-sideband modulation. This method ensures linearity in chirping and phase continuity of the optical carrier. The coherent homodyne receiver, incorporating both polarization and phase diversity, recovers the state of polarization (SOP) of the backscattered optical signal along the fiber, mixing with an identically chirped local oscillator. With a spatial resolution of approximately 5 mm, a 26 GHz chirping bandwidth, and a 200 us measurement time, this system enables precise birefringence measurements. By employing three mutually orthogonal SOPs of the launched optical signal, we measure relative birefringence vectors along the fiber.