Defense Notices

Bistatic Radar systems utilize physically separate transmit and receive systems to collect information that monostatic systems cannot. One issue with developing bisatic systems is guaranteeing synchronization between the transmitters and receivers. This project presents a purely digital method for improving synchronization of a bistatic system based on the GPS PPS signal, and using step-time for both transmitter and receiver timing. The issue of bistatic synchronization is simulated in Matlab and then modified to utilize the proposed step-time adjustment to show that the method works in theory. This method is then implemented in hardware on the digital system of CReSIS’s ‘HF Sounder’ radar system, and then tested to verify that the proposed method can be implemented in hardware and that it improves performance.

Just-in-time (JIT) compilation during program execution and 
ahead-of-time (AOT) compilation during software installation are 
alternate techniques used by managed language virtual machines 
(VM) to generate optimized native code while simultaneously 
achieving binary code portability and high execution performance. 
JIT compilers typically collect profile information at run-time to 
enable profile-guided optimizations (PGO) to customize the gener- 
ated native code to different program inputs/behaviors. AOT com- 
pilation removes the speed and energy overhead of online profile 
collection and dynamic compilation, but may not be able to achieve 
the quality and performance of customized native code. The goal 
of this work is to investigate and quantify the implications of the 
AOT compilation model on the quality of the generated native code 
for current VMs. 
First, we quantify the quality of native code generated by the 
two compilation models for a state-of-the-art (HotSpot) Java VM. 
Second, we determine how the amount of profile data collected af- 
fects the quality of generated code. Third, we develop a mechanism 
to determine the accuracy or similarity of different profile data for a 
given program run, and investigate how the accuracy of profile data 
affects its ability to effectively guide PGOs. Finally, we categorize 
the profile data types in our VM and explore the contribution of 
each such category to performance. 

Data mining is the process of finding meaningful information from data. Data mining can be used in several areas like business, medicine, education etc. It allows us to find patterns in the data and make predictions for the future. One form of data mining is to extract rules from data sets. In this project we discuss an implementation of one of the data mining algorithms called MLEM2 (Modified Learning from Examples Module, version 2). This algorithm uses the concept of blocks of attribute-value pairs. It is also robust and generates rules for both complete and incomplete data sets with numeric and symbolic attributes. A rule checker has been developed which is used to evaluate the rule sets produced by MLEM2. The accuracy of the rules is measured by computing the error rate which is the ratio of the number of incorrectly classified cases to the total number of all cases. Experiments are conducted on different kinds of data sets (complete, incomplete, numeric and symbolic) using 10-fold cross validation method.

Mobility models generate the mobility patterns of the nodes in a given system. Mobility models help us to analyze and study the characteristic of new and existing systems. Various mobility models implemented in network simulation tools like ns-3 does not model the patterns of human mobility. The main idea of this project is to implement the truncated Lévy walk mobility model in ns-3. The model has two variations, in the first variation, the flight length and pause time of the nodes are determined from the truncated Pareto distribution and in the second variation, Lévy distribution models the flight length and pause time distributions and the values are obtained by Lévy α-stable random number generator. The mobility patterns of the nodes are generated and analyzed for the model by changing various model attributes. Further studies can be done to understand the behavior of these models for different ad hoc networking protocols.

Identifying missing bed in radar data is very important in sea level changes. Increase in sea level is a problem of global importance because of its impact on infrastructure. Ice sheets in the Greenland and Antarctic are melting and increasing their contribution to sea level change over the last decade. Measuring ice sheets thickness is required to estimate sea level rise. We need to use several algorithms, pre-defined functions to extract the weak bed echoes, but we don’t have a tool in Matlab which contains some important algorithms like ImageJ. We can’t process all the data in ImageJ as Matlab produces better results compared to ImageJ as some of the functions like window and symmetric selection around center in FFT domain are not implemented in ImageJ. 
In this project, we will investigate the application of some image processing techniques using a GUI developed for analyzing ice sounding radargrams. One key advantage of the tool is that the image processing techniques are applied in a single GUI instead of doing separately. We apply these techniques on the data which came after applying extensive signal processing techniques. After performing these techniques, we compare the processed data with the original data. 

Mobility models generate the mobility patterns of the nodes in a given system. Mobility models help us to analyze and study the characteristic of new and existing systems. Various mobility models implemented in network simulation tools like ns-3 does not model the patterns of human mobility. The main idea of this project is to implement the truncated Lévy walk mobility model in ns-3. The model has two variations, in the first variation, the flight length and pause time of the nodes are determined from the truncated Pareto distribution and in the second variation, Lévy distribution models the flight length and pause time distributions and the values are obtained by Lévy α-stable random number generator. The mobility patterns of the nodes are generated and analyzed for the model by changing various model attributes. Further studies can be done to understand the behavior of these models for different ad hoc networking protocols. 

The DC to AC power Inverters (so-called Inverters) are widely used in industrial applications. The multilevel Inverters are becoming increasingly popular in industrial apparatus aimed at medium to high power conversion applications. In comparison to the conventional inverters, they feature superior characteristics such as lower total harmonic distortion (THD), higher efficiency, and lower switching voltage stress{Malinowski, 2010 #9}{Malinowski, 2010 #9}. Nevertheless, the superior characteristics come at the price of a more complex topology with an increased number of power electronic switches. As a general rule in a Inverter topology, as the number of power electronic switches increases, the chances of fault occurrence on of the switches increases, and thus the Inverter’s reliability decreases. Due to the extreme monetary ramifications of the interruption of operation in commercial and industrial applications, high reliability for power Inverters utilized in these sectors is critical. As a result, developing fault-tolerant operation schemes for multilevel Inverters has always been an interesting topic for researchers in related areas. The purpose of this proposal is to develop new control and fault-tolerant strategies for the multilevel power Inverter. In the event of a fault, the line voltages of the faulty Inverters are unbalanced and cannot be applied to the three phase loads. This fault-tolerant strategy generates balanced line voltages without bypassing any healthy and operative Inverter element, makes better use of the Inverter capacity and generates higher output voltage. This strategy exploits the advantages of the Selective Harmonic Elimination (SHE) method in conjunction with a slightly modified Fundamental Phase Shift Compensation technique to generate balanced voltages and manipulate voltage harmonics at the same time. However, due to the distinctive requirement of the strategy to manipulate both amplitude and angle of the harmonics, the conventional SHE technique is not the suitable basis for the proposed strategy. Therefore, in this project a modified Unbalanced SHE technique which can be used as the basis for the fault-tolerant strategy is developed. The proposed strategy is applicable to several classes of multilevel Inverters with three or more voltage levels. 

The DC to AC power Inverters (so-called Inverters) are widely used in industrial applications. The multilevel Inverters are becoming increasingly popular in industrial apparatus aimed at medium to high power conversion applications. In comparison to the conventional inverters, they feature superior characteristics such as lower total harmonic distortion (THD), higher efficiency, and lower switching voltage stress{Malinowski, 2010 #9}{Malinowski, 2010 #9}. Nevertheless, the superior characteristics come at the price of a more complex topology with an increased number of power electronic switches. As a general rule in a Inverter topology, as the number of power electronic switches increases, the chances of fault occurrence on of the switches increases, and thus the Inverter’s reliability decreases. Due to the extreme monetary ramifications of the interruption of operation in commercial and industrial applications, high reliability for power Inverters utilized in these sectors is critical. As a result, developing fault-tolerant operation schemes for multilevel Inverters has always been an interesting topic for researchers in related areas. The purpose of this proposal is to develop new control and fault-tolerant strategies for the multilevel power Inverter. In the event of a fault, the line voltages of the faulty Inverters are unbalanced and cannot be applied to the three phase loads. This fault-tolerant strategy generates balanced line voltages without bypassing any healthy and operative Inverter element, makes better use of the Inverter capacity and generates higher output voltage. This strategy exploits the advantages of the Selective Harmonic Elimination (SHE) method in conjunction with a slightly modified Fundamental Phase Shift Compensation technique to generate balanced voltages and manipulate voltage harmonics at the same time. However, due to the distinctive requirement of the strategy to manipulate both amplitude and angle of the harmonics, the conventional SHE technique is not the suitable basis for the proposed strategy. Therefore, in this project a modified Unbalanced SHE technique which can be used as the basis for the fault-tolerant strategy is developed. The proposed strategy is applicable to several classes of multilevel Inverters with three or more voltage levels.

Rule induction is one of the basic and important techniques of data mining. Inducing a rule set for symbolic data is simple and straightforward, but it becomes complex when the attributes are numerical. There are several algorithms available that do the task of rule induction for symbolic data. One such algorithm is PRISM which uses conditional probability for attribute-value selection to induce a rule. 
In the real world scenario, data may comprise of either symbolic or numerical attributes. It becomes difficult to induce a discriminant ruleset on the data with numerical attributes. This project provides an implementation of PRISM to handle numerical data. First, it takes as input, a dataset with numerical attributes and converts them into discrete values using the multiple scanning approach which identifies the cut-points for intervals using minimum conditional entropy. Once discretization completes, PRISM uses these discrete values to induce ruleset for each decision. Thus, this project helps to induce modular rulesets over a numerical dataset. 

The advancement in the field of embedded technology has resulted in its extensive use in almost all the modern electronic devices. Hence, unlike in the past, there is a very crucial need to develop system security tools for these devices. So far most of the research has been concentrated either on security for general computer systems or on static analysis of embedded systems. In this project, we develop tools that explore and monitor the run-time properties of programs/applications as well as the inter-process communication. We also present a case studies in which these tools are be used on a Gumstix (an embedded system) running Poky Linux system to monitor a particular program as well as print out a graph of all inter-process communication on the system.