Defense Notices

One of the most important reliability concerns for Solid-State Transformers (SST) is related to high voltage side switch and grid faults. High voltage stress on the switches, together with the fact that most modern SST topologies comprise a large number of power switches in the high voltage side, contribute to a higher probability of a switch fault occurrence. Furthermore, high voltage grid faults that result in unbalanced operating conditions in SSTs can lead to more dire consequences in regards to safety and reliability in comparison to traditional transformers. This work proposes a new SST topology in conjunction with a fault-tolerant operation strategy that can fully restore operation of the proposed SST in case of the two mentioned fault scenarios. Also, the proposed SST is a new topology to generate three-phase voltages from two-phase voltages, and it is designed to increase the lifetime of the proposed SST.

Nowadays, wireless communications are becoming so tightly integrated in our daily lives, especially with the global spread of laptops, tablets and smartphones. This has paved the way to dramatically increasing wireless network dimensions in terms of subscribers and amount of flowing data. The two important fundamental requirements for the future 5G wireless networks are abilities to support high data traffic and exceedingly low latency. A likely candidate to fulfill these requirements is multi-cell multi-user multi-input multiple-output (MIMO); also termed as coordinated multipoint (CoMP) transmission and reception. In order to achieve the highest possible performance of this aforementioned candidate technology, a properly designed resource allocation algorithm is needed. By designing a resource allocation algorithm which maximizes the network throughput, this technology is able to manage the exponential growth of wireless network dimensions. Moreover, with the rapidly growing data traffic, interference has become a major limitation in wireless networks. To deal with this issue and in order to manage the interference in the wireless network systems, various interference mitigation techniques have been introduced among which interference alignment (IA) has been shown to significantly improve the network performance. However, how to practically use IA to mitigate inter-cell interference in a downlink multi-cell multi-user MIMO networks still remains an open problem. To address the above listed problems, in this dissertation we improve the performance of wireless networks, in terms of spectral efficiency, by developing new algorithms and protocols that can efficiently mitigate the interference and allocate the resources. In particular, we will focus on designing new beamforming algorithms in downlink multi-cell multi-user MIMO networks. Furthermore, we mathematically analyze the performance improvement of multi-user MIMO networks employing proposed techniques. Fundamental relationships between network parameters and the network performance will be revealed, which will provide guidance on the wireless networks design. Finally, the results of theoretical study will be demonstrated using MATLAB.​

Even though fiber optics communication is providing a high bandwidth channel to achieve high speed data transmission, there is still a need for higher spectral efficiency, faster data processing speeds while reduced resource requirements due to ever increasing data and media traffic. Various multilevel modulation and demodulation techniques are used to improve spectral efficiency. Although, spectral efficiency is improved, there are other challenges that arise while doing so such as requirement for high speed electronics, receiver sensitivity, chromatic dispersion, operational flexibility etc. Here, we investigate multilevel modulation techniques to improve spectral efficiency while reducing the resource requirements.

We demonstrated a digital-analog hybrid subcarrier multiplexing (SCM) technique which can reduce the requirement of high speed electronics such as ADC and DAC, while providing wideband capability, high spectral efficiency, operational flexibility and controllable data-rate granularity.

With conventional Quadrature Phase Shift Keying (QPSK), to achieve maximum spectral efficiency, we need high spectral efficient Nyquist filters which takes high FPGA resources for digital signal processing (DSP). Hence, we investigated Quadrature Duobinary (QDB) modulation as a solution to reduce the FPGA resources required for DSP while achieving spectral efficiency of 2bits/s/Hz. Currently we are investigating all analog single sideband (SSB) complex field modulated direct detection system. Here, we are trying to achieve higher spectral efficiency by using QDB modulation scheme in comparison to QPSK while avoiding signal-signal beat interference (SSBI) by providing a guard-band based approach.

In coherent detection systems, the MLSE receiver could be implemented using Viterbi algorithm. However, in case of direct detection systems due to square law detection the noise in the received signal is not Gaussian anymore. This leads to requirement of channel behavior estimation for the implementation of MLSE receiver in direct detection systems. Recently, Kramers-Kronig receiver has attracted great deal of attention. We are working on utilizing Kramers-Kronig receiver to implement MLSE receiver for direct detection system without the need for channel estimation.

Trends toward large-scale integration and the high-power application of green energy resources necessitate the advent of efficient power converter topologies, multilevel converters. Multilevel inverters are effective solutions for high power and medium voltage DC-to-AC conversion due to their higher efficiency, provision of system redundancy, and generation of near-sinusoidal output voltage waveform. Among many proposed multilevel topologies, the neutral-point-clamped (NPC), flying capacitor (FC), and cascaded H-bridge (CHB) converters are the most well-known classical multilevel topologies. For generation of output voltages with more than five levels, the number of required diodes and capacitors in NPC and FC increases rapidly. Also, these two topologies suffer from a significant capacitor voltage balancing problem. CHBs also require bulky multi-winding transformers to realize several isolated dc sources. Recently, modular multilevel converter (MMC) has become increasingly attractive due to its modularity, high efficiency, excellent output voltage waveform, and no need for separate dc sources. To improve the harmonic profile of the output voltage, there is the need to increase the number of output voltage levels. However, this would require increasing the number of submodules (SMs) and power semi-conductor devices and their associated gate driver and protection circuitry, resulting in the overall multilevel converter to be complex and expensive. Fewer efforts have been devoted to proposing MMC-based multilevel topologies focusing on reduced part count. This work will investigate new medium-voltage high-power MMC-based multilevel inverter with reduced component numbers while using conventional half-bridge SM structure.

The second part of this work is on improving control of MMC-based high-power DC-DC converters. Medium-voltage DC (MVDC) grids have been the focus of numerous research studies in recent years due to their increasing applications in rapidly growing grid-connected renewable energy systems, such as wind, solar and wave farms. MMC-based DC-DC converters are employed for collecting power from offshore wind and wave farms. Among various developed high-power DC-DC converter topologies, MMC-based DC-DC converter with medium-frequency (MF) transformer is a valuable topology due to its numerous advantages. Specifically, they offer a significant reduction in the size of the MMC arm capacitors along with the ac-link transformer and arm inductors due to the ac-link transformer operating at medium frequencies. As such, this work focuses on improving the control of isolated MMMC-based DC-DC converters. Conventionally, the active power is controlled by phase shifts between the primary side and secondary side of transformers.  Through this work, adding degree of freedom is investigated by considering the amplitude ratio index of MMC leg as a single control parameter. From the derived analytical formulas, this will lead to operating points where the same active power is transferrable but current stress is reduced. Subsequently, longer lifetimes of the high-frequency transformer and power switches are expected.

The specific goals of this work are, (1) Investigating new topology of MMC-based inverter that generate the same peak-to-peak output voltage and voltage levels as conventional MMC but require fewer components. (2) Improving control of isolated MMC-based DC-DC converters to reduce the current stress of the switches and transformer while delivering same power.

Owing a mobile phone has come to be regarded as a necessity in today’s world. Smart phone is an effective way to locate a person anywhere in this world. Android is an open source software stack with the largest number of users. Hence, this application is developed in Android. LocTrac is an Android application used to track the location of the user. During the time of emergencies or accidents, a person may not be in a situation to let others know about his/her location. LocTrac is an application which automatically send the user’s location to registered contacts so that they can track him/her down. In this application we initially register few contacts as guardians, when the user doesn’t answer the call, his/her location is automatically sent to the registered contacts. This application also uses sensors to capture the phone movement and send the location. Timer, alarm, emergency call are other features of this application.

Enormous amount of data is being generated due to advancement in technology. The basic question of discovering knowledge from the data generated is still pertinent. Data mining guides us in discovering patterns or rules. Various techniques are applied to find the error rate on testing data sets based on rules generated from stratified training data sets. In this project, using the k-Fold Cross Validation approach, we vary the number of folds the training data set is divided into, stratify the folds, and find the error rates on testing data sets for each ‘k’. For every data set in each k, experiment is repeated certain number of times such that there is a random testing data set each time. We observed that as the value of k increases, the error rate starts getting stabilized, and there is a stage when error rate doesn't increase even if we increase the number of folds.

With the exponential growth of cyber-physical systems (CPSs), new security challenges have emerged. Various vulnerabilities, threats, attacks, and controls have been introduced for the new generation of CPS. However, there lacks a systematic review of the CPS security literature. In particular, the heterogeneity of CPS components and the diversity of CPS systems have made it difficult to study the problem with one generalized model. As the first component of this dissertation, existing research on CPS security is studied and systematized under a unified framework. Smart cars, as a CPS application, was further explored under the proposed framework and new attacks are identified and addressed.

The Control Area Network (CAN bus) is a prevalent serial communication protocol adopted in industrial CPS, especially in small and large vehicles, ships, planes, and even in drones, radar systems, and submarines. Unfortunately, the CAN bus was designed without any security considerations. We then propose and demonstrate a stealthy targeted Denial of Service (DoS) attack against CAN. Experimentations show that the attack is effective and superior to attacks of the same category due to its stealthiness and ability to avoid detection from current countermeasures.

Two controls are proposed to defend against various spoofing and DoS attacks on CAN. The first one aims to minimize the attack using ID-Hopping mechanism such that CAN arbitration IDs are randomized so an attacker would not be able to target them. ID-Hopping raises the bar for attackers by randomizing the expected patterns in CAN network. Such randomization hinders the attacker's ability to launch targeted DoS attacks. Based on the evaluation on the testbed, the randomization mechanism, ID-Hopping, holds a promising solution for targeted DoS, and reverse engineering CAN IDs, which CAN networks are most vulnerable to. The second countermeasure is a novel CAN firewall that aims to prevent an attacker from launching a plethora of untraditional attacks on CAN that existing solutions do not adequately address.  The firewall is placed between a potential attacker’s node and the rest of the CAN bus. Traffic is controlled bidirectionally between the main bus and the attacker’s side so that only benign traffic can pass to the main bus. This ensures that an attacker cannot arbitrarily inject malicious traffic into the main bus. Demonstration and evaluation of the attack and firewall were conducted by a bit-level analysis, i.e., “Bit banging”, of CAN’s traffic. Results show that the firewall successfully prevents the stealthy targeted DoS attack, as well as, other recent attacks. To evaluate the proposed attack and firewall, a testbed was built that consists of BeagleBone Black and STM32 Nucleo-144 microcontrollers to simulate real CAN traffic.

Finally, a design of an Intrusion Detection System (IDS) is proposed to complement the firewall. It utilizes the proposed firewall to add situational awareness capabilities to the bus’s security posture and detect and react to attacks that might bypass the firewall based on certain rules.

Present day manufacturers have invented different memory technologies with distinct bandwidth, energy and cost tradeoffs. Systems with such heterogeneous memory technologies can only achieve the best performance and power characteristics by appropriately partitioning process data on OS pages and placing OS pages in the right memory areas. To achieve effective data partitioning and placement we need to first understand how programs access memory and how those patterns change at various stages (phases) of program execution. The goal of this work is to build a framework, design experiments and conduct analysis to understand overall memory usage patterns across many programs.

We use Intel’s Pin dynamic binary translation and instrumentation system for this work. Our Pin based framework instruments programs at run-time to collect data regarding memory allocations, de-allocations, reads and writes, which we then analyze using our specialized scripts. We collect and analyze information including page access counts, hot page ratio, memory read and write access patterns and how that varies in different program phases. We also analyze the similarities regarding memory behavior between distinct phases during program execution. We also study memory behavior both with cache and without cache to understand how caches affect the memory access behavior. 

A learning map is an unweighted directed graph containing relationships between discrete skills and concepts with edges defining the prerequisite hierarchy. They arose as a means of connecting student instruction directly to standards and curriculum and are designed to assist teachers in lesson planning and evaluating student response. As learning maps gain popularity there is an increasing need for teachers to quickly evaluate which nodes have been mastered by their students. Psychometrics is a field focused on measuring student performance and includes the development of processes used to link a student's response to multiple choice questions directly to their understanding of concepts. This dissertation focuses on developing modeling and visualization capabilities to enable efficient analysis of data pertaining to student understanding generated by psychometric techniques.

Such analysis naturally includes that done by classroom teachers. Visual solutions to this problem clearly indicate the current understanding of a student or classroom in such a way as to make suggestions that can guide future learning. In response to these requirements we present various experimental approaches which augment the original learning map design with targeted visual variables. Particular attention is given to variable selection and their effect on the usability of the resulting graphics.

As well as looking forward, we also consider methods by which data visualization can be used to evaluate and improve existing teaching methods. We present several graphics based on modelling student progression as information flow. These methods rely on conservation of data to increase edge information, reducing the load carried by the nodes and encouraging path comparison.

Finally, we propose a means of combining features of key experimental approaches to design a single graphic capable of meeting both the predictive and validation requirements. We also propose several methods to measure the effectiveness and correctness of the final design.

This work proposes several advanced predictive switching algorithms and modulation methods for power electronics converters based on model predictive control (MPC) paradigm. The proposed methods retain the advantages of conventional MPC methods in programing the nonlinear effects of the converter into the design calculations to improve the overall dynamic performance and steady state operation of the system. Besides, the proposed methods provide a fixed switching frequency operation of the system, which results in regulating the system objectives with minimized ripple. In the first part of this work, a new modulation based MPC technique is proposed. The proposed method provides flexibility to prioritize different objectives of the system against each other using weighting factors. To further evaluate the merits of the proposed method, it has been used to control modular multilevel converters (MMCs) in voltage-source-converter high-voltage-DC (VSC-HVDC) systems. The proposed method minimizes the line total harmonic distortion (THD), circulating current ripple and steady-state error.  Furthermore, a new Finite-Control-Set MPC (FCS-MPC) method for controlling MMCs with minimized computational burden is proposed that doesn’t employ weighting factors to control different system objectives.

Furthermore, a Modulated MPC (MMPC) based control system for a Z-source Inverter (ZSI) based Permanent Magnet Synchronous Motor (PMSM) drive system is proposed. The Proposed method uses two separate MMPC loops for the Z-source network and PMSM control.  For the Z-source network, a cascaded MMPC control scheme has been proposed and for the PMSM, a novel MMPC controller is proposed that predicts the future value of PMSM current vectors, selects specific current vectors that minimize a certain cost function the most, and performs modulation between them.

Finally, a torque ripple minimization method for a PMSM drive system that utilizes a modified quasi-Z-source (qZS) inverter which provides a wider range of capabilities for inverter input voltage control is proposed. It also allows for modification of the traditional switching sequence selection scheme when using the Space Vector Modulation (SVM) for switching. The provided flexibilities are leveraged to develop a control system that minimizes the torque ripples during PMSM operation while satisfying conventional control objectives such as shaft speed control.