Tamzidul Hoque
- Assistant Professor
Contact Info
Lawrence, KS 66045
Personal Links
Biography —
Research —
Research interests:
- Hardware Trust Verification
- Hardware IP protection from piracy and reverse engineering
- CAD tool development for hardware security and trust
Teaching —
Courses:
- EECS 690: Introduction to Hardware Security and Trust, Fall'20, Sp'22
- EECS 388: Embedded Systems, Sp'21, Sp'22
Selected Publications —
Books and Chapters in Books
2. Alaql, A., Rahman, M. M., Hoque, T., & Bhunia, S. (2020). Hardware obfuscation for IP protection. Frontiers in Hardware Security and Trust: Theory, design and practice, 71.
1. Deb Nath, A. P., Hoque, T., Ray, S., & Bhunia, S. (2019). An Adaptable System-on-Chip Security Architecture for Internet of Things Applications. In Internet of Things (pp. 61-85). Springer International Publishing.
Journal Articles
7. Yang, S., Hoque, T., Chakraborty, C., & Bhunia, S. (2021). Golden-Free Hardware Trojan Detection using Self-referencing. IEEE Transactions on Very Large-Scale Integration (VLSI) Systems.
6. Alaql, A., Chattopadhyay, C., Chakraborty, C., Hoque, T., & Bhunia, S. (2021) LeGO : A Learning Guided Obfuscation Framework for Hardware IP Protection. In IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD). IEEE.
5. Wang, X., Hoque, T., Basak, A., Karam, R., Hu, W., Mu, D., & Bhunia, S. (2020). Hardware Trojan Attack in Embedded Memory. ACM Journal on Emerging Technologies in Computing Systems.
4. Hoque, T., SLPSK, P., & Bhunia, S. (2020). Trust Issues in Microelectronics: The Concerns and the Countermeasures. IEEE Consumer Electronics Magazine.
3. Hoque, T., Yang, K., Karam, R., Tajik, S., Forte, D., Tehranipoor, M., & Bhunia, S. (2020). Hidden in Plaintext: An Obfuscation-based Countermeasure against FPGA Bitstream Tampering Attacks. ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 25(1).
2. Hoque, T., Chakraborty, R. S., & Bhunia, S. (2020). Hardware Obfuscation and Logic Locking: A Tutorial Introduction. IEEE Design & Test, 37(3), 59-77.
1. Hoque, T., Narasimhan, S., Wang, X., Mal-Sarkar, S., & Bhunia, S. (2017). Golden-Free Hardware Trojan Detection with High Sensitivity Under Process Noise. JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 33(1), 107-124.
Conference Proceedings
21. Hoque, T., Chakraborty, P., Cruz, J., & Bhunia, S. (2021). Does Scan Protection Work Under Zero Trust? A Case Study on Scan Chain Obfuscation. In GOMACTech-2022 Conference.
20. Cruz, J., Nair, A., Hoque, T., Chakraborty, P., Gaikwad, P., Masna, N. V.R., & Bhunia, S. (in press). MIMIC: A Machine Intelligence Based Trojan Benchmarking Framework. In GOMACTech-2020 Conference.
19. Hoque, T., Yang, S., Bhattacharyay, A., Cruz, J., Chakraborty, P., & Bhunia, S. (in press). An Automated Framework for Board-level Trojan Benchmarking. In GOMACTech-2020 Conference.
18. Hoque, T., SLPSK, P., & Bhunia, S. (2020). Trust Issues in COTS: The Challenges and Emerging Solution. In Proceedings of the 2020 on Great Lakes Symposium on VLSI (pp. 211--216).
17. Chakraborty, P., Parker, R., Hoque, T., Cruz, J., & Bhunia, S. (2020). P2C2: Peer-to-Peer Car Charging. In 2020 IEEE 91st Vehicular Technology Conference (VTC2020-Spring). IEEE.
16. Alaql, A., Hoque, T., Forte, D., & Bhunia, S. (2019). Quality Obfuscation for Error-Tolerant and Adaptive Hardware IP Protection. In 2019 IEEE 37th VLSI Test Symposium (VTS). IEEE.
15. Salmani, H., Hoque, T., Bhunia, S., Yasin, M., Rajendran, J. J., & Karimi, N. (2019). Special Session: Countering IP Security threats in Supply chain. In 2019 IEEE 37th VLSI Test Symposium (VTS). IEEE.
14. Yang, S., Alaql, A., Hoque, T., & Bhunia, S. (2019). Runtime Integrity Verification in Cyber-physical Systems using Side-Channel Fingerprint. In 2019 IEEE International Conference on Consumer Electronics (ICCE). IEEE. http://dx.doi.org/10.1109/icce.2019.8662071 doi:10.1109/icce.2019.8662071
13. Hoque, T., Cruz, J., Chakraborty, P., & Bhunia, S. (2018). A Systematic Machine Learning Framework for IP Trust Verification. In SRC TECHCON.
12. Hoque, T., Cruz, J., Chakraborty, P., & Bhunia, S. (2018). Hardware IP Trust Validation: Learn (the Untrustworthy), and Verify. In 2018 IEEE International Test Conference (ITC). IEEE.
11. Hoque, T., Wang, X., Basak, A., Karam, R., & Bhunia, S. (2018). Hardware Trojan attacks in embedded memory. In 2018 IEEE 36th VLSI Test Symposium (VTS). IEEE.
10. Hoque, T., Mishra, P., & Bhunia, S. (2017). A Systematic Feature Selection Methodology for Machine Learning Based Hardware Trojan Detection. In SRC TECHCON.
9. Karam, R., Hoque, T., Butler, K., & Bhunia, S. (2017). Mixed-granular architectural diversity for device security in the Internet of Things. In 2017 Asian Hardware Oriented Security and Trust Symposium (AsianHOST). IEEE.
8. Karam, R., Hoque, T., Ray, S., Tehranipoor, M., & Bhunia, S. (2017). MUTARCH: Architectural diversity for FPGA device and IP security. In 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC). IEEE.
7. Hoque, T., Karam, R., & Bhunia, S. (2016). Protection of IPs mapped to FPGA against Malicious Hardware. In SRC TECHCON.
6. Karam, R., Hoque, T., Ray, S., Tehranipoor, M., & Bhunia, S. (2016). Robust bitstream protection in FPGA-based systems through low-overhead obfuscation. In 2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE.
5. Karam, R., Hoque, T., Ray, S., Tehranipoor, M., & Bhunia, S. (2016). Technical demonstration session: Software toolflow for FPGA bitstream obfuscation. In 2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig). IEEE.
4. Ray, S., Hoque, T., Basak, A., & Bhunia, S. (2016). The power play: Security-energy trade-offs in the IoT regime. In 2016 IEEE 34th International Conference on Computer Design (ICCD). IEEE.
3. Paley, S., Hoque, T., & Bhunia, S. (2016). Active protection against PCB physical tampering. In 2016 17th International Symposium on Quality Electronic Design (ISQED). IEEE.
2. Amsaad, F., Hoque, T., & Niamat, M. (2015). Analyzing the performance of a configurable ROPUF design controlled by programmable XOR gates. In 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE.
1. Hoque, T., Mustapa, M., Amsaad, F., & Niamat, M. (2015). Assessment of NAND based ring oscillator for hardware Trojan detection. In 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE.
Grants & Other Funded Activity —
- Hoque, T. (Lead PI), Bhunia, S. (PI), Rahman, M. T. (PI), “Collaborative Research: SaTC: EDU: Hardware Security Education for All through Seamless Extension of Existing Curriculum,” Secure and Trustworthy Cyberspace (SaTC) program under National Science Foundation., Submitted: December 18, 2020. (Accepted for funding). Project Period July 1, 2021 to June 30, 2024 (Estimated). Total amount received: $400,000, Amount Received for KU: $163,001
- New Faculty Startup Grant from the University Kansas, Amount Received: $300,000