Enabling Versal-Based Signal Processing Through a Development Framework and User Guide


Student Name: Luke Staudacher
Defense Date:
Location: Nichols Hall, Room 246 (Executive Conference Room)
Chair: Jonathan Owen

Shannon Blunt

Carl Leuschen

Erik Perrins

Abstract:

AMD’s latest generation of adaptive system-on-chip (SoC) devices, the Versal product family, offers enhanced processing capabilities that are attractive to researchers and system designers. However, these capabilities introduce a significant knowledge barrier, limiting the practical benefits of Versal devices compared to more mature platforms from AMD, Intel, and other industry vendors. This project addresses this challenge through two primary deliverables: a software framework and a comprehensive user manual targeting Versal development. The software framework, named RSL Versal Core, provides a framework for users unfamiliar with Versal devices by selectively abstracting away more complex design components. Using a small set of commands, users can synthesize a programmable logic (PL) design, compile a Linux operating system for the onboard Arm processor with PL communication support, and program supported development boards. Following initial setup, the framework also supports extended software and firmware development for specific project needs. The accompanying user manual documents both RSL Versal Core and broader Versal development concepts. It guides users through reproducing and customizing the framework outputs manually and introduces key architectural and design principles useful for effective Versal-based system development. Together, these deliverables enable new developers to rapidly gain proficiency with Versal platforms and enable implementation of digital signal processing (DSP) concepts.

Degree: MS Project Defense (CoE)
Degree Type: MS Project Defense
Degree Field: Computer Engineering